Electrostatic discharge (ESD) related failures have long plagued integrated circuit manufacturers and users. Electrostatic discharge induced failure becomes a major Integrated Circuit (IC) reliability problem as IC technologies migrate into the very-deep-sub-micron (VDSM), ultra large scale integration (ULSI) regime.
In the design and development of electrostatic discharge protection structures, the interactions between those structures and the circuits being protected are a vital consideration. Multipoint Low Voltage Differential Signaling (MLVDS) circuits, especially, pose unique difficulties to electrostatic discharge protection designers because of the polarity shifts associated with MLVDS operation.
Conventional electrostatic discharge protection circuits provide a shunt for electrostatic discharge energy at voltages above a threshold, typically the reverse bias breakdown voltage of a diode or the inherent diode action of a protection structure. In one type of common electrostatic discharge protection circuit, an Input/Output (I/O) connection is protected by providing a diode between the pad and ground, and a diode between the pad and VCC. Normally, any voltage exceeding the threshold voltage (VT) of either diode is shunted away from the internal circuit associated with the data pad. In devices operating exclusively in positive, or exclusively in negative, voltages relative to the substrate or to some other reference, the dual diode design works reasonably well. However, in MLVDS operation, the input voltage (VIN) swing of normal operation ranges from positive to negative voltages. For example, the specification for MLVDS defines the signal voltage swing as −1.4V to +3.8V. Voltage swings of this magnitude can cause one or the other of the diodes to conduct, effectively shorting the pad during normal operation. Accordingly, dual-diode electrostatic discharge protection circuits are not suitable for MLVDS applications.
Another type of conventional ESD protection circuit uses a grounded-gate NMOS transistor that conducts electrostatic discharge energy to ground when the voltage of the electrostatic discharge exceeds the breakdown voltage of the device. When the electrostatic discharge (ESD) event has passed the gate voltage is pulled low and the MOS device is again non-conducting. This type of electrostatic discharge protection circuit works reasonably well where pad voltages during normal operation remain exclusively positive relative to ground. However, when operation involves negative as well as positive voltages, the MOS device can conduct during normal operation, thus effectively shorting the element to ground. Accordingly, grounded-gate MOS electrostatic discharge protection circuits are not suitable for MLVDS applications.
What is needed, then, is a means for protecting MLVDS circuits from electrostatic discharge that will not turn on during normal operation of the MLVDS circuit that includes both positive and negative voltage levels.